RESEARCH PAPERS: Heat Conduction

Prediction and Measurement of Temperature Fields in Silicon-on-Insulator Electronic Circuits

[+] Author and Article Information
K. E. Goodson, M. I. Flik

Department of Mechanical Engineering, Massachusetts Institute of Technology, Cambridge, MA 02139

L. T. Su, D. A. Antoniadis

Department of Electrical Engineering and Computer Science, Massachusetts Institute of Technology, Cambridge, MA 02139

J. Heat Transfer 117(3), 574-581 (Aug 01, 1995) (8 pages) doi:10.1115/1.2822616 History: Received September 01, 1993; Revised May 01, 1994; Online December 05, 2007


Field-effect transistors (FETs ) in conventional electronic circuits are in contact with the high-thermal-conductivity substrate. In contrast, FETs in novel silicon-on-insulator (SOI ) circuits are separated from the substrate by a thermally resistive silicon-dioxide layer. The layer improves the electrical performance of SOI circuits. But it impedes conduction cooling of transistors and interconnects, degrading circuit reliability. This work develops a technique for measuring the channel temperature of SOI FETs. Data agree well with the predictions of an analytical thermal model. The channel and interconnect temperatures depend strongly on the device and silicon-dioxide layer thicknesses and the channel–interconnect separation. This research facilitates the thermal design of SOI FETs to improve circuit figures of merit, e.g., the median time to failure (MTF ) of FET–interconnect contacts.

Copyright © 1995 by The American Society of Mechanical Engineers
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