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TECHNICAL PAPERS: Microscale Heat Transfer

Sub-Continuum Simulations of Heat Conduction in Silicon-on-Insulator Transistors

[+] Author and Article Information
Per G. Sverdrup, Kenneth E. Goodson

Department of Mechanical Engineering, Stanford University, Stanford, CA 94305

Y. Sungtaek Ju

IBM Corporation, Almaden Research Center

J. Heat Transfer 123(1), 130-137 (Jun 25, 2000) (8 pages) doi:10.1115/1.1337651 History: Received September 23, 1999; Revised June 25, 2000
Copyright © 2001 by ASME
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References

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Figures

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(a) Scanning electron micrograph of an IBM SOI transistor, which shows the thin silicon device layer separated from the bulk silicon substrate by a buried oxide layer (Courtesy of IBM Corporation); (b) schematic representation of a SOI device used in these simulations. The region of heat release corresponds to the region of strong electron-phonon scattering. The simulated device is a NMOS transistor with source/drain doping of arsenic at 1.5e20 cm−3 , phosphorous source/drain extensions, and a background boron doping concentration of 1e17 cm−3 .
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Impact of the energy transmission coefficient at the silicon/silicon dioxide interface on the peak device temperature rise
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Energy balance at the silicon/oxide interface
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Numerical characteristics of discrete ordinates approximations
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SOI device heat generation rate caused by strong electron-phonon scattering. This quantity is extracted from an electrical simulation in MEDICI.
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Temperature contours in a SOI device calculated using the heat diffusion equation and bulk properties in MEDICI
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Temperature contours in a SOI device calculated using the coupled BTE/heat diffusion equation code

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