Integrated Microchannel Cooling for Three-Dimensional Electronic Circuit Architectures

[+] Author and Article Information
Jae-Mo Koo, Linan Jiang, Kenneth E. Goodson

Mechanical Engineering Department, Stanford University, Stanford, CA 94305

Sungjun Im

Materials Science and Engineering Department, Stanford University, Stanford, CA 94305

J. Heat Transfer 127(1), 49-58 (Feb 15, 2005) (10 pages) doi:10.1115/1.1839582 History: Received April 23, 2004; Revised September 11, 2004; Online February 15, 2005
Copyright © 2005 by ASME
Your Session has timed out. Please sign back in to continue.



Grahic Jump Location
Three-dimensional circuit architecture connected to a conventional heat removal device
Grahic Jump Location
Conceptual schematic of a microchannel cooling network for a 3D circuit and the thermal circuit model. (a) 3D circuit with a microchannel cooling system. (b) Thermal circuit for microchannel cooling.
Grahic Jump Location
Schematic of hierarchical 3D circuit structures fabricated by (a) wafer bonding, and (b) silicon epitaxial growth or recrystallization of polysilicon
Grahic Jump Location
Schematic of microchannels implemented in a 3D circuit and thermal modeling of microchannel cooling for a 3D circuit. Only one channel is analyzed in a cooling layer by geometric and thermal symmetries. Dotted lines indicate a control volume used in derivation of energy equations [Eqs. (1) and (2)]. (a) Schematic of microchannel cooling for a 3D circuit. (b) Thermal circuit of the jth microchannel.
Grahic Jump Location
Predictions for the effective thermal conductance and thermal resistance. (a) Effective conduction area and effective solid conductivity in the z direction. (b) Conduction thermal resistance between device layers.
Grahic Jump Location
Flowchart showing the calculation procedure used in this study
Grahic Jump Location
Two-layer 3D circuit layouts for evaluating the performance of microchannel cooling. The areas occupied by memory and logic are the same and the logic disssipates 90% of the total power consumption 53.
Grahic Jump Location
Comparison of junction temperatures in a two-layer stacked circuit for the cases of an integrated microchannel heat sink and a conventional heat sink. The total flow rate of the liquid water is 15 ml/min and the mass flux is 1.36×10−5 kg/s.




Some tools below are only available to our subscribers or users with an online account.

Related Content

Customize your page view by dragging and repositioning the boxes below.

Related Journal Articles
Related eBook Content
Topic Collections

Sorry! You do not have access to this content. For assistance or to subscribe, please contact us:

  • TELEPHONE: 1-800-843-2763 (Toll-free in the USA)
  • EMAIL: asmedigitalcollection@asme.org
Sign In