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RESEARCH PAPERS: Micro/Nanoscale Heat Transfer

Nanoscale Heat Conduction Across Metal-Dielectric Interfaces

[+] Author and Article Information
Y. “Sungtaek” Ju1

Department of Mechanical and Aerospace Engineering, University of California, Los Angeles, CA 90095-1597just@seas.ucla.edu

Ming-Tsung Hung, Takane Usui

Department of Mechanical and Aerospace Engineering, University of California, Los Angeles, CA 90095-1597

1

Also with Biomedical Engineering Interdepartmental Program.

J. Heat Transfer 128(9), 919-925 (Mar 01, 2006) (7 pages) doi:10.1115/1.2241839 History: Received July 22, 2005; Revised March 01, 2006

We report a theoretical study of heat conduction across metal-dielectric interfaces in devices and structures of practical interest. At cryogenic temperatures, the thermal interface resistance between electrodes and a substrate is responsible for substantial reduction in the maximum permissible peak power in Josephson junctions. The thermal interface resistance is much smaller at elevated temperatures but it still plays a critical role in nanoscale devices and structures, especially nanolaminates that consist of alternating metal and dielectric layers. A theoretical model is developed to elucidate the impact of spatial nonequilibrium between electrons and phonons on heat conduction across nanolaminates. The diffuse mismatch model is found to provide reasonable estimates of the intrinsic thermal interface resistance near room temperature as well as at cryogenic temperatures.

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Copyright © 2006 by American Society of Mechanical Engineers
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Figures

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Figure 1

Cross-sectional diagram of a superconductor-normal metal-superconductor Josephson junction. The electrodes are typically made of Nb, which become superconducting at temperatures below approximately 9K. The barrier is a normal metal.

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Figure 2

Predicted and experimentally determined critical power of Nb-MoSi-Nb Josephson junctions. The data are from Chong (9). Two types of junctions with different bottom electrode-substrate interfaces are studied. The silicon substrates were maintained at 4K.

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Figure 3

Geometry and thermal boundary conditions used to analyze heat conduction across a metal layer sandwiched between two amorphous dielectric layers as part of a nanolaminate

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Figure 4

Predicted electron and phonon temperature profiles in the metal layer for three cases with different values of Lm∕δ

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Figure 5

Predicted out-of-plane thermal resistance of Au films sandwiched between two dielectric materials at room temperature. The dashed line is obtained using the present two-fluid heat conduction model and the sold line using the conventional heat conduction model.

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Figure 6

The effective thermal conductivity of Ta∕TaOx nanolaminates plotted as a function of interface density at room temperature. The symbols are experimental data (6) and the dotted line is the prediction of the present two-fluid model.

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Figure 7

The thermal resistance per unit thickness of W-AlOx nanolaminates at room temperature. The symbols are experimental data (5), the dotted line is the prediction of the conventional continuum heat conduction model, and the solid line is the prediction of the present two-fluid model. The nanolaminates were synthesized using the atomic layer deposition (ALD) technique at two different temperatures or using the magnetron sputtering technique (Magnetron) as described in (5).

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Figure 8

The thermal resistance of SiOx films near room temperature reported in the literature (20,22-23) as a function of thickness. The y intercept is commonly interpreted as the thermal interface resistance.

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