0
TECHNICAL PAPERS: Electronic Cooling

# Experimental and Numerical Study of a Stacked Microchannel Heat Sink for Liquid Cooling of Microelectronic Devices

[+] Author and Article Information
Xiaojin Wei

IBM, 2070 Route 52, Hopewell Junction, NY 12533xwei@us.ibm.com

Yogendra Joshi

Georgia Institute of Technology, 771 Ferst Drive, Atlanta, GA 30332yogendra.joshi@me.gatech.edu

Michael K. Patterson

Intel Corporation, JF1-231, 2111 NE 25th Avenue, Hillsboro, OR 97124michael.k.patterson@intel.com

J. Heat Transfer 129(10), 1432-1444 (Feb 23, 2007) (13 pages) doi:10.1115/1.2754781 History: Received April 11, 2006; Revised February 23, 2007

## Abstract

One of the promising liquid cooling techniques for microelectronics is attaching a microchannel heat sink to, or directly fabricating microchannels on, the inactive side of the chip. A stacked microchannel heat sink integrates many layers of microchannels and manifold layers into one stack. Compared with single-layered microchannels, stacked microchannels provide larger flow passages, so that for a fixed heat load the required pressure drop is significantly reduced. Better temperature uniformity can be achieved by arranging counterflow in adjacent microchannel layers. The dedicated manifolds help to distribute coolant uniformly to microchannels. In the present work, a stacked microchannel heat sink is fabricated using silicon micromachining techniques. Thermal performance of the stacked microchannel heat sink is characterized through experimental measurements and numerical simulations. Effects of coolant flow direction, flow rate allocation among layers, and nonuniform heating are studied. Wall temperature profiles are measured using an array of nine platinum thin-film resistive temperature detectors deposited simultaneously with thin-film platinum heaters on the backside of the stacked structure. Excellent overall cooling performance $(0.09°C∕Wcm2)$ for the stacked microchannel heat sink has been shown in the experiments. It has also been identified that over the tested flow rate range, counterflow arrangement provides better temperature uniformity, while parallel flow has the best performance in reducing the peak temperature. Conjugate heat transfer effects for stacked microchannels for different flow conditions are investigated through numerical simulations. Based on the results, some general design guidelines for stacked microchannel heat sinks are provided.

<>

## Figures

Figure 1

Schematic of the test flow loop

Figure 2

Schematic of the test module. Dimensions are not drawn to scale. (a) Exploded view of the stacked microchannel, (b) channel cross section and dimensions, (c) Side view of the stacked microchannel, and (d) bottom view of the thin-film heaters and temperature sensors.

Figure 3

Typical calibration curves of the resistive sensors

Figure 4

Wall temperature distribution for parallel flow and uniform heating

Figure 5

Wall temperature distribution for counterflow and uniform heating

Figure 6

Total thermal resistances for parallel flow and counterflow with equal flow rate at each of the two microchannels layers

Figure 7

Total thermal resistances for parallel flow with different interlayer flow rate ratios

Figure 8

Total thermal resistances for counterflow with different interlayer flow rate ratios

Figure 9

On-chip thermal resistances for different flow combinations

Figure 10

Temperature distribution for parallel flow with downstream half heating

Figure 11

Temperature distribution for counterflow with downstream half heating

Figure 12

Temperature distribution for parallel flow with upstream half heating

Figure 13

Temperature distribution for counterflow with downstream half heating

Figure 14

Increases in thermal resistance for parallel flow cases undergoing localized heating

Figure 17

Wall temperature distribution along the flow direction for counterflow with 1.38×10−6m3∕s(83ml∕min) total flow rate

Figure 18

Heat flux at solid-liquid interfaces in kW∕m2 for a total flow rate of 1.38×10−6m3∕s(83ml∕min). (a) parallel flow and (b) counterflow.

Figure 19

Temperature contour map (K) for the cross sections (Z-Y plane) at different axial positions, parallel flow with total flow rate of 1.38×10−6m3∕s(83ml∕min). (a) x=0.65mm, (b) x=5mm, and (c) x=9.35mm.

Figure 20

Temperature contour map (K) for cross sections at different axial positions for counterflow at a total flow rate of 1.38×10−6m3∕s(83ml∕min). (a) x=0.65mm, (b) x=5mm, and (c) x=9.35mm.

Figure 21

Heat flux at solid-liquid interfaces in kW∕m2 for a total flow rate of 5×10−6m3∕s(300ml∕min). (a) Parallel flow and (b) counterflow.

Figure 22

Temperature contours (K) for the cross sections at different axial positions for parallel flow at a total flow rate of 5×10−6m3∕s(300ml∕min). (a) x=0.65mm, (b) x=5mm, and (c) x=9.35mm.

Figure 23

Temperature contours (K) for the cross sections at different axial positions for counterflow at a total flow rate of 5×10−6m3∕s(300ml∕min). (a) x=0.65mm, (b) x=5mm, and (c) x=9.35mm.

Figure 15

Increases in thermal resistance for counterflow cases undergoing localized heating

Figure 16

Domain of computation for numerical modeling

## Errata

Some tools below are only available to our subscribers or users with an online account.

### Related Content

Customize your page view by dragging and repositioning the boxes below.

Related Journal Articles
Related eBook Content
Topic Collections