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Research Papers: Heat Transfer in Manufacturing

Thermophysical and Geometrical Effects on the Thermal Performance and Optimization of a Three-Dimensional Integrated Circuit

[+] Author and Article Information
Fatemeh Tavakkoli, Shujuan Wang

Department of Mechanical Engineering,
University of California,
Riverside, CA 92521

Siavash Ebrahimi

Department of Mechanical and
Aerospace Engineering,
University of California,
Irvine, CA 92697

Kambiz Vafai

Department of Mechanical Engineering,
University of California,
Riverside, CA 92521
e-mail: vafai@engr.ucr.edu

1Corresponding author.

Contributed by the Heat Transfer Division of ASME for publication in the JOURNAL OF HEAT TRANSFER. Manuscript received December 31, 2015; final manuscript received February 10, 2016; published online May 3, 2016. Assoc. Editor: Andrey Kuznetsov.

J. Heat Transfer 138(8), 082101 (May 03, 2016) (7 pages) Paper No: HT-15-1825; doi: 10.1115/1.4033138 History: Received December 31, 2015; Revised February 10, 2016

A comprehensive analysis and optimization of a three-dimensional integrated circuit (3D IC) structure and its thermophysical attributes are presented in this work. The thermophysical and geometrical attributes studied in this paper include the die, device layer, heat sink, and heat spreader, which are critical structures within a 3D IC. The effect of the power density of the device layer which is the source of heat generation within the chip as well as the through silicon vias (TSV) and microbumps is also considered in our investigation. The thermophysical and geometrical parameters that have a significant impact on the thermal signature of the 3D IC as well as those that have an insignificant impact were established. The comprehensive analysis of different geometrical and thermophysical attributes can guide the design and optimization of a 3D IC structure and decrease the cost.

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References

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Figures

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Fig. 1

Schematic of the 3D IC [7]

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Fig. 2

Temperature distribution of the nominal 3D IC structure

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Fig. 3

Effect of thickness of the die and area of the chip on the hotspot temperature

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Fig. 4

Effect of thermal conductivity of the die and area of the chip on the hotspot temperature

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Fig. 5

Effect of thickness of the device layer and area of the chip on the hotspot temperature

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Fig. 6

Effect of thickness of the TIM and area of the chip on the hotspot temperature

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Fig. 7

Effect of thermal conductivity and thickness of the heat spreader on the hotspot temperature

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Fig. 8

Effect of area of the heat spreader and total thermal power of the chip on the hotspot temperature

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Fig. 10

Effect of thermal conductivity and convective heat transfer coefficient of the substrate on the hotspot temperature

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Fig. 9

Effect of thermal conductivity and thickness of the heat sink on the hotspot temperature

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Fig. 11

Effect of the ratio of the heat sink to substrate convective heat transfer coefficient (ϕ) and thermal conductivity (ψ) on heat dissipation within the 3D IC chip and the hotspot temperatures

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